Exploring system architectures in AADL via Polychrony and SynDEx

doi:10.1007/s11704-013-2307-z

Front. Comput. Sci.

2013, Vol. 7

Issue (5) : 627-649 https://doi.org/10.1007/s11704-013-2307-z

RESEARCH ARTICLE

Exploring system architectures in AADL via Polychrony and SynDEx

Huafeng YU¹, Yue MA¹, Thierry GAUTIER¹(

), Loïc BESNARD², Jean-Pierre TALPIN¹, Paul Le GUERNIC¹, Yves SOREL³

¹. INRIA Rennes - Bretagne Atlantique, 263, av. du Général Leclerc, Rennes 35042, France
². IRISA/CNRS, 263, av. du Général Leclerc, Rennes 35042, France
³. INRIA Paris - Rocquencourt, Domaine de Voluceau, BP 105, Le Chesnay Cedex 78153, France

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Abstract

Architecture analysis & design language (AADL) has been increasingly adopted in the design of embedded systems, and corresponding scheduling and formal verification have been well studied. However, little work takes code distribution and architecture exploration into account, particularly considering clock constraints, for distributed multi-processor systems. In this paper, we present an overview of our approach to handle these concerns, together with the associated toolchain, AADL-Polychrony-SynDEx. First, in order to avoid semantic ambiguities of AADL, the polychronous/multiclock semantics of AADL, based on a polychronous model of computation, is considered. Clock synthesis is then carried out in Polychrony, which bridges the gap between the polychronous semantics and the synchronous semantics of SynDEx. The same timing semantics is always preserved in order to ensure the correctness of the transformations between different formalisms. Code distribution and corresponding scheduling is carried out on the obtained SynDEx model in the last step, which enables the exploration of architectures originally specified in AADL. Our contribution provides a fast yet efficient architecture exploration approach for the design of distributed real-time and embedded systems. An avionic case study is used here to illustrate our approach.

Keywords Polychrony Signal AADL SynDEx architecture exploration modeling timing analysis scheduling distribution

Corresponding Author(s): Thierry GAUTIER

Issue Date: 01 October 2013

Cite this article:

Huafeng YU,Yue MA,Thierry GAUTIER, et al. Exploring system architectures in AADL via Polychrony and SynDEx[J]. Front. Comput. Sci., 2013, 7(5): 627-649.

URL:

https://academic.hep.com.cn/fcs/EN/10.1007/s11704-013-2307-z
https://academic.hep.com.cn/fcs/EN/Y2013/V7/I5/627

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