A survey of neural network accelerators

doi:10.1007/s11704-016-6159-1

Front. Comput. Sci.

2017, Vol. 11

Issue (5) : 746-761 https://doi.org/10.1007/s11704-016-6159-1

REVIEW ARTICLE

A survey of neural network accelerators

Zhen LI¹, Yuqing WANG², Tian ZHI¹, Tianshi CHEN¹(

)

¹. State Key Laboratory of Computer Architecture, Institute of Computing Technology, Chinese Academy of Sciences, Beijing 100190, China
². School of Computer Science and Technology, University of Science and Technology of China, Hefei 230026, China

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Abstract

Machine-learning techniques have recently been proved to be successful in various domains, especially in emerging commercial applications. As a set of machinelearning techniques, artificial neural networks (ANNs), requiring considerable amount of computation and memory, are one of the most popular algorithms and have been applied in a broad range of applications such as speech recognition, face identification, natural language processing, ect. Conventionally, as a straightforward way, conventional CPUs and GPUs are energy-inefficient due to their excessive effort for flexibility. According to the aforementioned situation, in recent years, many researchers have proposed a number of neural network accelerators to achieve high performance and low power consumption. Thus, the main purpose of this literature is to briefly review recent related works, as well as the DianNao-family accelerators. In summary, this review can serve as a reference for hardware researchers in the area of neural networks.

Keywords neural networks accelerators FPGAs ASICs DianNao series

Corresponding Author(s): Tianshi CHEN

Just Accepted Date: 19 October 2016 Online First Date: 07 June 2017 Issue Date: 26 September 2017

Cite this article:

Zhen LI,Yuqing WANG,Tian ZHI, et al. A survey of neural network accelerators[J]. Front. Comput. Sci., 2017, 11(5): 746-761.

URL:

https://academic.hep.com.cn/fcs/EN/10.1007/s11704-016-6159-1
https://academic.hep.com.cn/fcs/EN/Y2017/V11/I5/746

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