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Frontiers of Computer Science

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Front. Comput. Sci.    2023, Vol. 17 Issue (5) : 175106    https://doi.org/10.1007/s11704-022-2127-0
REVIEW ARTICLE
FPGA sharing in the cloud: a comprehensive analysis
Jinyang GUO1, Lu ZHANG1, José ROMERO HUNG2, Chao LI1(), Jieru ZHAO1, Minyi GUO1
1. Department of Computer Science and Engineering, Shanghai Jiao Tong University, Shanghai 200240, China
2. Department of Micro/Nano Electronics, Shanghai Jiao Tong University, Shanghai 200240, China
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Abstract

Cloud vendors are actively adopting FPGAs into their infrastructures for enhancing performance and efficiency. As cloud services continue to evolve, FPGA (field programmable gate array) systems would play an even important role in the future. In this context, FPGA sharing in multi-tenancy scenarios is crucial for the wide adoption of FPGA in the cloud. Recently, many works have been done towards effective FPGA sharing at different layers of the cloud computing stack.

In this work, we provide a comprehensive survey of recent works on FPGA sharing. We examine prior art from different aspects and encapsulate relevant proposals on a few key topics. On the one hand, we discuss representative papers on FPGA resource sharing schemes; on the other hand, we also summarize important SW/HW techniques that support effective sharing. Importantly, we further analyze the system design cost behind FPGA sharing. Finally, based on our survey, we identify key opportunities and challenges of FPGA sharing in future cloud scenarios.
Keywords cloud FPGA      FPGA sharing      efficiency      design cost     
Corresponding Author(s): Chao LI   
Just Accepted Date: 26 July 2022   Issue Date: 15 December 2022
 Cite this article:   
Jinyang GUO,Lu ZHANG,José ROMERO HUNG, et al. FPGA sharing in the cloud: a comprehensive analysis[J]. Front. Comput. Sci., 2023, 17(5): 175106.
 URL:  
https://academic.hep.com.cn/fcs/EN/10.1007/s11704-022-2127-0
https://academic.hep.com.cn/fcs/EN/Y2023/V17/I5/175106
Related survey works Focus Year
Survey of deep learning neural networks implementation on FPGAs [6] Application 2020
Accelerating DNNs from local to virtualized FPGA in the Cloud: a survey of trends [7] Application 2021
Survey and future trends for FPGA cloud architectures [8] Architecture 2021
A survey of system architectures and techniques for FPGA virtualization [9] Virtualization 2021
Security of FPGAs in data centers [10] Security 2017
Trust in FPGA-accelerated cloud computing [11] Security 2021
Security of cloud FPGAs: a survey [12] Security 2021
SoK: secure FPGA multi-tenancy in the cloud: challenges and opportunities [13] Security 2021
Tab.1  Other surveys of the cloud FPGA in multi-tenancy scenarios
Fig.1  The organization of this work
Fig.2  A taxonomy of FPGA sharing
Resource category Resource type Configuration & description Sharing object
Logic resource [42,43] Programmable I/O unit Configurable I/O port Configuration
Programmable logic unit LUT and register
Function unit Pre-defined hardware functions
Hard core Control hard core
Connectivity [14,30,44–49] PCIe IP PCI express control Bandwith
NIC Network control
Wiring resource Configurable connectivity units
Memory [15,39,50,51] Distributed RAM Multi-mode memory Capacity & bandwith
DRAM Off-chip memory storage
HBM High bandwidth storage
BRAM RAM with changeable port
Tab.2  FPGA resources and the sharing object
Fig.3  Floorplans of Xilinx Alveo series boards
Fig.4  FPGA sharing in multi-granularity
Category Support Related work
Hardware Reconfiguration [15,21,32,33,63]
Connectivity [30,46]
Partition [1,21,55]
Software Isolation [64]
Migration [65,66]
Abstraction [64,67]
Virtualization [18,68,69]
Management [15,46,60]
Scheduling [21,44,47,56,69]
Development [18,31,47]
Security Data Confidentiality [70–72]
Bitstream Protection [60,73-75]
Power Control [7678]
Workload Isolation [3,30,45,79]
Configuration Refresh [63,80]
Tab.3  Supports for FPGA sharing
Work SW support Organization Contorl unit Sharing manner Year Key technique
RC3E [56] RV, RM, TS PRR I/O S&T 2016 Hypervisor
VFR [54] RV, RM, TS PRR I/O S&T 2016 PRR manager
RRaaS [45] RV, RM, TS, DT PRR API S&T 2016 NoC, hypervisor
hCODE [47] RV, RM, TS, DT PRR I/O & logic S&T 2018 PRR manager
FPGApooling [21] RV, RM, TS PRR I/O& logic S&T 2021 Pooling scheduler
Feniks [64] RV,RM,SA,PI DPRR I/O & logic S&T 2017 Region isolation, I/O abstraction
RACOS [46] RV, RM DPRR Accelertor API S&T 2017 PCIe controller
LiveMig [66] RV,TM,TS DPRR I/O& logic S&T 2018 Live task migration
AmorphOS [30] RV, RM DPRR I/O S&T 2018 PCIe controller, Zone manager
ViTAL [18] RV, RM, DT DPRR I/O & logic S&T 2020 Compiler, Hypervisor
Coyote [67] RV, RM, SA, TS DPRR I/O & logic S&T 2020 OS abstraction
Hetero-ViTAL [31] RV, RM, TS, DT DPRR I/O & logic S&T 2021 Hypervisor, LL Block
pvFPGA [44] RM, TS Board Accelertor API T 2013 Xen VMM
Catapult [15] RM, TS Board I/O & Network T 2014 Resource controller
VFACC [60] RM, TS Board Accelertor API T 2015 Hypervisor, PCIe controller
Blaze [57] RM, TS, DT Board I/O T 2016 Run-time manager
QMC [83] RM, TS Board I/O & Network T 2017 Avalone connector
Migration [65] RM,TN,TS. Board API & Network T 2017 vFPGA-based Migration
RTDNN [69] RM, TS Board Accelertor API T 2018 Hypervisor
FPGAvirt [49] RM, TS Board Network T 2018 NoC, Sevice manager
Tab.4  Software support of FPGA sharing, categorized by target partition of device
Stage Cost types Source Explanation Quantity Related work
Preparation Prep. Costs Hardware Expenditure of Facility Money Cost (＄) [1-5,15,82]
Security Prevention Costs: Encryption/Isolation Overhead (O & ＄) [3,73,74]
Software Development Labor Costs Money Cost (＄) [14,18,30,31]
Execution Exec. Costs Security Power Control/Assets Protection Overhead (O & D) [76,77,86]
Software Scheduling/Data/Execution Overhead (D) [21,49,88,89]
Release Post Costs Security Configuration Memory Refresh Overhead (D) [11,80,90]
Tab.5  Costs of FPGA sharing, categorised by the execution stage, cost type and quantification
  
  
  
  
  
  
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