Analysis and implementation of FEC in 10G-EPON

doi:10.1007/s12200-009-0053-5

Front Optoelec Chin

2009, Vol. 2

Issue (4) : 384-388 https://doi.org/10.1007/s12200-009-0053-5

RESEARCH ARTICLE

Analysis and implementation of FEC in 10G-EPON

Guozhou JIANG(

), Deming LIU

School of Optoelectronic Science and Engineering, Huazhong University of Science and Technology, Wuhan 430074, China

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Abstract

Forward error correction (FEC) may reduce the bit-error ratio (BER) and provide coding gain, so FEC is considered as a mandatory part in 10 Gbit/s Ethernet passive optical networks (10G-EPONs). First, the basic concepts of FEC and Reed-Solomon (RS) code are introduced in this paper. After a detailed description of the implementation of FEC in 10G-EPON, computed result shows that FEC based on R_RS(255,223) can meet the need of 10G-EPON’s high power budget. Therefore, FEC is the performance choice with high added value in 10G-EPON.

Keywords forward error correction (FEC) 10 Gbit/s Ethernet passive optical network (10G-EPON) Reed-Solomon (RS) code bit-error ratio (BER) coding gain optical line terminal (OLT) optical network unit (ONU)

Corresponding Author(s): JIANG Guozhou,Email:jgz_hust@163.com

Issue Date: 05 December 2009

Cite this article:

Guozhou JIANG,Deming LIU. Analysis and implementation of FEC in 10G-EPON[J]. Front Optoelec Chin, 2009, 2(4): 384-388.

URL:

https://academic.hep.com.cn/foe/EN/10.1007/s12200-009-0053-5
https://academic.hep.com.cn/foe/EN/Y2009/V2/I4/384

Tab.1 Frame delimiters for FEC-coded frames

Fig.1 FEC frame structure

Fig.2 Location of FEC in Ethernet stack

Fig.3 FEC encoder block diagram (XSBI: sixteen bit interface)

Fig.4 FEC decoder block diagram

Fig.5 Theoretical performance of RS code

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