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Exploiting write power asymmetry to improve phase change memory system performance |
Qi WANG1,2,*( ),Donghui WANG1,Chaohuan HOU1 |
1. Institute of Acoustics, Chinese Academy of Sciences, Beijing 100190, China
2. School of Physics, University of Chinese Academy of Sciences, Beijing 100049, China |
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Abstract Phase change memory (PCM) is a promising candidate to replace DRAM as main memory, thanks to its better scalability and lower static power than DRAM. However, PCM also presents a few drawbacks, such as long write latency and high write power. Moreover, the write commands parallelism of PCM is restricted by instantaneous power constraints, which degrades write bandwidth and overall performance. The write power of PCM is asymmetric: writing a zero consumes more power than writing a one. In this paper, we propose a new scheduling policy, write power asymmetry scheduling (WPAS), that exploits the asymmetry of write power. WPAS improveswrite commands parallelism of PCM memory without violating power constraint. The evaluation results show that WPAS can improve performance by up to 35.5%, and 18.5% on average. The effective read latency can be reduced by up to 33.0%, and 17.1% on average.
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| Keywords
phase change memory
write power asymmetry
command scheduling
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Corresponding Author(s):
Qi WANG
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Issue Date: 07 September 2015
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