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HSCS: a hybrid shared cache scheduling scheme for multiprogrammed workloads |
Jingyu ZHANG1,2, Chentao WU1, Dingyu YANG1,3( ), Yuanyi CHEN1, Xiaodong MENG1, Liting XU1, Minyi GUO1() |
1. Department of Computer Science and Engineering, Shanghai Jiao Tong University, Shanghai 200240, China
2. Hunan Provincial Key Laboratory of Intelligent Processing of Big Data on Transportation, School of Computer and Communication Engineering, Changsha University of Science and Technology, Changsha 410004, China
3. School of Electronics and Information, Shanghai Dianji University, Shanghai 200240, China |
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Abstract The traditional dynamic random-access memory (DRAM) storage medium can be integrated on chips via modern emerging 3D-stacking technology to architect a DRAM shared cache in multicore systems. Compared with static random-access memory (SRAM), DRAM is larger but slower. In the existing research, a lot of work has been devoted to improving the workload performance using SRAM and stacked DRAM together in shared cache systems, ranging from SRAM structure improvement to optimizing cache tags and data access. However, little attention has been paid to designing a shared cache scheduling scheme for multiprogrammed workloads with different memory footprints in multicore systems. Motivated by this, we propose a hybrid shared cache scheduling scheme that allows a multicore system to utilize SRAM and 3D-stacked DRAM efficiently, thus achieving better workload performance. This scheduling scheme employs (1) a cache monitor, which is used to collect cache statistics; (2) a cache evaluator, which is used to evaluate the cache information during the process of programs being executed; and (3) a cache switcher, which is used to self-adaptively choose SRAM or DRAM shared cache modules. A cache data migration policy is naturally developed to guarantee that the scheduling scheme works correctly. Extensive experiments are conducted to evaluate the workload performance of our proposed scheme. The experimental results showed that our method can improve the multiprogrammed workload performance by up to 25% compared with state-of-the-art methods (including conventional and DRAM cache systems).
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multicore system
shared cache
workload performance
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Corresponding Author(s):
Dingyu YANG,Minyi GUO
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Just Accepted Date: 16 May 2017
Online First Date: 08 June 2018
Issue Date: 04 December 2018
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