ApipelinedReed-Solomon decoder based on a modified step-by-step algorithm
Xing-ru PENG1(),Wei ZHANG1(),Yan-yan LIU2()
1. School of Electronic and Information Engineering, Tianjin University, Tianjin 300072, China 2. College of Electronic Information and Optical Engineering, Nankai University, Tianjin 300071, China
We propose a pipelined Reed-Solomon (RS) decoder for an ultra-wideband system using a modified stepby-step algorithm. To reduce the complexity, the modified step-by-step algorithm merges two cases of the original algorithm. The pipelined structure allows the decoder to work at high rates with minimum delay. Consequently, for RS(23,17) codes, the proposed architecture requires 42.5% and 24.4% less area compared with a modified Euclidean architecture and a pipelined degree-computationless modified Euclidean architecture, respectively. The area of the proposed decoder is 11.3% less than that of the previous step-by-step decoder with a lower critical path delay.
Baek, J.H., Sunwoo, M.H., 2006. New degree computationless modified Euclid algorithm and architecture for Reed-Solomon decoder. IEEE Trans. VLSI Syst., 14(8):915–920.
2
Batra, A., Balakrishnan, J., Dabak, A., , 2004. Multiband OFDM Physical Layer Proposal for IEEE 802.15 Task Group 3a. IEEE P802.15-03/268r2.
3
Berlekamp, E.R., 1968. Algebraic Coding Theory. McGraw-Hill, New York.
4
Chen, T.C., Tasi, M.H., 2007. Hardware implementation of a high-speed (32, 24, 4) RS decoder. Chung Hua J. Sci. Eng., 5(4):21–27.
5
Chen, T.C., Wei, C.H., Wei, S.W., 2000. Step-by-step decoding algorithm for Reed-Solomon codes. IEE Proc. Commun., 147(1):8–12.
6
Chen, T.C., Wei, C.H., Wei, S.W., 2003. A pipeline structure for high-speed step-by-step RS decoding.IEICE Trans. Commun., E86-B(2):847–849.
7
Das, A.S., Das, S., Bhaumik, J., 2013. Design of RS(255,251) encoder and decoder in FPGA. Int. J. Soft Comput. Eng., 2(6):391–394.
8
García-Herrero, F., Valls, J., Meher, P.K., 2011. High-speed RS(255, 239) decoder based on LCC decoding. Circ. Syst. Signal Process., 30(6):1643–1669.
9
Guo, W., Gai, W., 2014. Area-efficient recursive degree computationless modified Euclid’s architecture for Reed-Solomon decoder. Proc. IEEE Int. Conf. on Electron Devices and Solid-State Circuits, p.1–2.
