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Moving from exascale to zettascale computing: challenges and techniques |
Xiang-ke LIAO, Kai LU(), Can-qun YANG, Jin-wen LI, Yuan YUAN, Ming-che LAI, Li-bo HUANG, Ping-jing LU, Jian-bin FANG, Jing REN, Jie SHEN |
College of Computer, National University of Defense Technology, Changsha 410073, China |
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Abstract High-performance computing (HPC) is essential for both traditional and emerging scientific fields, enabling scientific activities to make progress. With the development of high-performance computing, it is foreseeable that exascale computing will be put into practice around 2020. As Moore’s law approaches its limit, high-performance computing will face severe challenges when moving from exascale to zettascale, making the next 10 years after 2020 a vital period to develop key HPC techniques. In this study, we discuss the challenges of enabling zettascale computing with respect to both hardware and software. We then present a perspective of future HPC technology evolution and revolution, leading to our main recommendations in support of zettascale computing in the coming future.
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Keywords
High-performance computing
Zettascale
Micro-architectures
Interconnection
Storage system
Manufacturing process
Programming models and environments
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Corresponding Author(s):
Kai LU
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Issue Date: 03 December 2018
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[1] |
FITEE-1236-18005-XKL_suppl_1
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[2] |
FITEE-1236-18005-XKL_suppl_2
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