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Sub-5 nm bilayer GaSe MOSFETs towards ultrahigh on-state current |
Xueping Li1,2,3, Xiaojie Tang1, Zhuojun Wang1, Peize Yuan3, Lin Li3, Chenhai Shen3, Congxin Xia3( ) |
1. College of Electronic and Electrical Engineering, Henan Normal University, Xinxiang 453007, China 2. Henan Key Laboratory of Optoelectronic Sensing Integrated Application, Xinxiang 453007, China 3. School of Physics, Henan Normal University, Xinxiang 453007, China |
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Abstract Dielectric engineering plays a crucial role in the process of device miniaturization. Herein we investigate the electrical properties of bilayer GaSe metal-oxide-semiconductor field-effect transistors (MOSFETs), considering hetero-gate-dielectric construction, dielectric materials and GaSe stacking pattern. The results show that device performance strongly depends on the dielectric constants and locations of insulators. When high-k dielectric is placed close to the drain, it behaves with a larger on-state current (Ion) of 5052 μA/μm when the channel is 5 nm. Additionally, when the channel is 5 nm and insulator is HfO2, the largest Ion is 5134 μA/μm for devices with AC stacking GaSe channel. In particular, when the gate length is 2 nm, it still meets the HP requirements of ITRS 2028 for the device with AA stacking when high-k dielectric is used. Hence, the work provides guidance to regulate the performance of the two-dimensional nanodevices by dielectric engineering.
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Keywords
GaSe stacking pattern
metal-oxide-semiconductor field-effect transistors (MOSFETs)
ultrahigh on-state current
dielectric engineering
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Corresponding Author(s):
Congxin Xia
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About author: |
Issue Date: 27 March 2024
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