|
Ascalable and efficient IPv4 address sharing approach in IPv6 transition scenarios
Guo-liang HAN, Cong-xiao BAO, Xing LI
Frontiers of Information Technology & Electronic Engineering. 2015, 16 (8): 634-645.
https://doi.org/10.1631/FITEE.1500022
IPv6 has been an inevitable trend with the depletion of the global IPv4 address space. However, new IPv6 users still need public IPv4 addresses to access global IPv4 users/resources, making it important for providers to share scarce global IPv4 addresses effectively. There are two categories of solutions to the problem, carrier-grade NAT (CGN) and ‘A+P’ (each customer sharing the same IPv4 address is assigned an excluded port range). However, both of them have limitations. Specifically, CGN solutions are not scalable and can bring much complexity in managing customers in large-scale deployments, while A+P solutions are not flexible enough to meet dynamic port requirements. In this paper, we propose a hybrid mechanism to improve current solutions and have deployed it in the Tsinghua University Campus Network. The real traffic data shows that our mechanism can utilize limited IPv4 addresses efficiently without degrading the performance of applications on end hosts. Based on the enhanced mechanism, we propose a method to help service providers make address plans based on their own traffic patterns and actual requirements.
参考文献 |
补充材料 |
相关文章 |
多维度评价
|
|
Enhancing power transfer capability through flexible AC transmission system devices: a review
Fadi M. ALBATSH, Saad MEKHILEF, Shameem AHMAD, H. MOKHLIS, M. A. HASSAN
Frontiers of Information Technology & Electronic Engineering. 2015, 16 (8): 658-678.
https://doi.org/10.1631/FITEE.1500019
Global demand for power has significantly increased, but power generation and transmission capacities have not increased proportionally with this demand. As a result, power consumers suffer from various problems, such as voltage and frequency instability and power quality issues. To overcome these problems, the capacity for available power transfer of a transmission network should be enhanced. Researchers worldwide have addressed this issue by using flexible AC transmission system (FACTS) devices. We have conducted a comprehensive review of how FACTS controllers are used to enhance the available transfer capability (ATC) and power transfer capability (PTC) of power system networks. This review includes a discussion of the classification of different FACTS devices according to different factors. The popularity and applications of these devices are discussed together with relevant statistics. The operating principles of six major FACTS devices and their application in increasing ATC and PTC are also presented. Finally, we evaluate the performance of FACTS devices in ATC and PTC improvement with respect to different control algorithms.
参考文献 |
补充材料 |
相关文章 |
多维度评价
|
|
Flexible resonant tank for a combined converter to achieve an HPS and LED compatible driver
Jin HU,Hui-pin LIN,Zheng-yu LU,Feng-wu ZHOU
Frontiers of Information Technology & Electronic Engineering. 2015, 16 (8): 679-693.
https://doi.org/10.1631/FITEE.1500054
High pressure sodium (HPS) lamp has been widely used in street lighting applications because of its maturity, reliability, high lighting efficiency, long life-time, and low cost. Light emitting diode (LED) is expected as the next generation lighting source due to its continuously improving luminous efficacy, better color characteristic, and super long life-time. The two lighting sources may coexist in street lighting applications for a long time. A novel HPS and LED compatible driver is proposed which is rather suitable and flexible for driving HPS and LED in street lighting applications. The proposed driver combines the LLC and LCC resonant circuits into a flexible resonant tank. The flexible resonant tank may change to LLC or isolated LCC circuit according to the lighting source. It inherits the traditional HPS and LED drivers’ zero voltage switching (ZVS) characteristics and dimmable function. The design of the proposed flexible resonant tank considers the requirements of both HPS and LED. The experiments of driving HPS and LED on a prototype driver show that the driver can drive the two lighting sources flexibly with high efficiency.
参考文献 |
补充材料 |
相关文章 |
多维度评价
|
|
Design of a novel RTD-based three-variable universal logic gate
Mao-qun YAO,Kai YANG,Cong-yuan XU,Ji-zhong SHEN
Frontiers of Information Technology & Electronic Engineering. 2015, 16 (8): 694-699.
https://doi.org/10.1631/FITEE.1500102
Traditional CMOS technology faces some fundamental physical limitations. Therefore, it has become very important for the integrated circuit industry to continue to develop modern devices and new design methods. The threshold logic gate has attracted much attention because of its powerful logic function. The resonant tunneling diode (RTD) is well suited for implementing the threshold logic gate because of its high-speed switching capability, negative differential resistance (NDR) characteristic, and functional versatility. In this paper, based on the Reed-Muller (RM) algebraic system, a novel method is proposed to convert three-variable non-threshold functions to the XOR of multiple threshold functions, which is simple and has a programmable implementation. With this approach, all three-variable non-threshold functions can be presented by the XOR of two threshold functions, except for two special functions. On this basis, a novel three-variable universal logic gate (ULG3) is proposed, composed of two RTD-based universal threshold logic gates (UTLG) and an RTD-based three-variable XOR gate (XOR3). The ULG3 has a simple structure, and a simple method is presented to implement all three-variable functions using one ULG3. Thus, the proposed ULG3 provides a new efficient universal logic gate to implement RTD-based arbitrary n-variable functions.
参考文献 |
补充材料 |
相关文章 |
多维度评价
|
|
Multi-stage dual replica bit-line delay technique for process-variation-robust timing of lowvoltageSRAMsense amplifier
Shou-biao TAN,Wen-juan LU,Chun-yu PENG,Zheng-ping LI,You-wu TAO,Jun-ning CHEN
Frontiers of Information Technology & Electronic Engineering. 2015, 16 (8): 700-706.
https://doi.org/10.1631/FITEE.1400439
A multi-stage dual replica bit-line delay (MDRBD) technique is proposed for reducing access time by suppressing the sense-amplifier enable (SAE) timing variation of low voltage static random-access memory (SRAM) applications. Compared with the traditional technique, this strategy, using statistical theory, reduces the timing variation by using multi-stage ideas, meanwhile doubling the replica bit-line (RBL) capacitance and discharge path simultaneously in each stage. At a supply voltage of 0.6 V, the simulation results show that the standard deviations of the SAE timing and cycle time with the proposed technique are 69.2% and 47.2%, respectively, smaller than that with a conventional RBL delay technique in TSMC 65 nm CMOS technology (Taiwan Semiconductor Manufacturing Company, Taiwan).
参考文献 |
补充材料 |
相关文章 |
多维度评价
|
8篇文章
|